New Release: Simulink and Stateflow Tester 4.1.0
T-VEC Tester for Simulink and Stateflow 4.1.0 is now generally available.
New and improved features in the Simulink Tester include:
- Significant translator memory optimizations, a critical improvement for very large models
- Updates to support changes in Simulink/Stateflow releases 2006b, 2007a & 2007b
- Updates to support Matrix Concatenation and Diagonal Matrices
- Updates to support Merge blocks, Buses, Reusable subsystems, and Data Store
- Improved support for identifying NO CHANGE transitions in Stateflow
- Updates to the Signal Range GUI to provide multiple selection and setting
- Test driver support for Stateflow multi-triggered, hierarchical state machines with parallel states
- Test driver support for model references
- Test driver support for LDRA
Please see the Release Notes for more details on the changes in this release.
The T-VEC Tester for Simulink and Stateflow 4.1.0 requires T-VEC Vector Generation System release 3.1.0.
For additional information and guidance, please see the T-VEC wiki. The Wiki contains information about T-VEC's suite of tools, tips on tool use, examples and explanations of how tools have been used or tailored to meet clients' needs, methodological guidelines and best practices, and other related information.